This application note covers 10km 10G DML base SFP+ design details and test solution: includes module side schematic, PCB layout, firmware, BOM, debugging tips; also evaluation board
The 10G SFP+ AOC Checker combines the Serial Pattern Generator, Bit Error Rate Analyzer. It provides common transmission rate for 8x Fiber Channel, OC-192 and 10G Ethernet.
This application note covers the 10km 10G DML basic SFP+ design details and test solutions: including module-side schematics, PCB layout, firmware, BOM, and debugging
Now that Link is up on 10G 1/1, we can send some broadcast (default setup) frames from 10G 1/1 to 10G 1/2. Also, 10G 1/1 will be Rx disabled to avoid the internal looped frames coming back to the Switch.
LS1043AQDS integrates MAC 9 as XFI 10G SFP+ by default, please refer to u-boot and dts file LS1043ARDB. Please refer to the function board_ft_fman_fixup_port in
View the TI TIDA-00088 reference design block diagram, schematic, bill of materials (BOM), description, features and design files and start designing.
This repository contains an example project for two ZC706 boards communicating over a 10-Gigabit network, using optical transcievers in the SFP+ cages on the boards.
This document provides details on TI''s 10G optical module SFP+ total solution, including: 1. The solution includes a transmitter (laser driver and DML), receiver (ROSA and limiting amplifier), and MCU for
Debug transceiver detail doesn''t seem to be catching anything, and I can''t find any debug command for modules. I did set debugging on the interface to try and catch anything there, but I''m less than hopeful.
The module contains a combination of VCSEL driver and limiting amplifier with a 3-wire digital control interfaced from FPGA. This 3-wire interface enables the FPGA to access the registers of the Laser
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